1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device via gate-through ion implantation.
2. Description of the Related Art
FIG. 1 is a flow chart illustrating a conventional method of manufacturing a semiconductor device. FIGS. 2 and 3 are cross-sectional views illustrating partial steps of a method of manufacturing a semiconductor device of FIG. 1.
Referring now to FIG. 1 in conjunction with FIGS. 2 and 3, isolation films 210 defining an active region 220 of a semiconductor substrate 200 are first formed (Step 110). Next, as represented by arrows in FIG. 2, ion implantation for well regions and channel region is carried out, utilizing a cell-open mask (Step 120). Then, ion implantation for the well regions and channel region is carried out, utilizing an NMOS-open mask (Step 130). Next, ion implantation for the well regions and channel region is carried out, utilizing a PMOS-open mask (Step 140).
Next, a gate stack 240 including gate insulating film patterns 241 and gate conductive film patterns 242 sequentially stacked thereon is formed on the channel region 230. Then, gate spacers 250 are formed on side faces of the gate stack 240 (Step 150). Next, as represented by arrows in FIG. 3, junction ion implantation is carried out, utilizing a cell-open mask (Step 160). Consequently, source/drain regions 260 are formed within the cell regions. Next, junction ion implantation for an NMOS region of a peripheral circuit region is carried out, utilizing an NMOS-open mask (Step 170). Next, junction ion implantation for a PMOS region of a peripheral circuit region is carried out, utilizing a PMOS-open mask (Step 180).
However, the recently increased degree of integration of semiconductor devices leads to sharp shortening in a channel length of MOS transistors constituting the semiconductor devices. With such a shortened channel length of MOS transistors, short-channel effects (SCF) serve as a primary cause deteriorating properties and performance of devices. In particular, short-channel effects result in deterioration of leakage current characteristics in the off-state of the devices. As a method to solve such problems, a dopant concentration of a channel may be increased. However, increased dopant concentration of the channel may augment hot carrier effects, thereby deteriorating reliability of the devices. As such, a suitable concentration of dopant ions should be implanted, but the concentration of implanted dopants is significantly affected by a subsequent thermal process. In particular, implanted dopants are diffused by the thermal process until formation of the source/drain regions 260 after forming the gate stack 240, thus resulting in decreased concentration thereof, and consequently, short-channel effects become more severe. In order to alleviate such problems, halo ion implantation is conventionally employed during formation of junctions, but suffers from disadvantages such as increased numbers of masks and process steps, thus resulting in complicated manufacturing processes of semiconductor devices.